Cadence
Sde-2
Overview
As a member of our Placement Team, you will design, develop, maintain, and enhance our cutting-edge detailed placement technologies. You will work at the forefront of advanced semiconductor design, developing lithography-driven placement solutions for leading-edge process nodes.
About Cadence
Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.
Requirements & Eligibility
- Strong software development skills in C/C++.
- Solid understanding of QoR (Quality of Results) and PPA (Performance, Power, and Area) optimization.
- Proven experience with EDA back-end design flows, including placement, timing analysis, optimization, and routing.
- Strong interest in and understanding of developing complex software systems on Unix/Linux platforms.
- Excellent verbal and written communication and presentation skills.
- Experience working with TSMC and semiconductor design companies is a strong plus.
- M.S. degree in Electrical Engineering, Computer Science, or a related field required; Ph.D. preferred.
Key Responsibilities
- Lead the development and maintenance of core placement algorithms.
- Design, implement, and enhance advanced placement technologies and methodologies.
- Collaborate with the Routing and OPT teams to define and develop next-generation algorithms.
- Conduct peer code reviews and maintain high standards for code quality, scalability, thread safety, and test coverage.
- Work closely with cross-functional teams to improve solution quality, performance, and usability.
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